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Call for Papers

The Twenty Seventh International 

In conjunction with IPDPS 2018, May 21, 2018, Vancouver, Canada

Sponsored by the IEEE Computer Society,
through the Technical Committee on Parallel Processing (TCPP),
and by the U.S. Office of Naval Research (ONR).

Most modern computing systems are heterogeneous, either for organic reasons because components grew independently as it is the case in desktop grids, or by design to leverage the strength of specific hardware as it is the case in accelerated systems. In any case, all computing systems have some form of hardware or software heterogeneity that must been managed, leveraged and understood. HCW is a venue to discuss and innovate in all theoretical and practical aspects of heterogeneous computing: programmability, modeling, design, applications, efficient utilization, algorithms, etc.

TOPICS


Topics of interest include but are not limited to the following areas:

  • Heterogeneous multicore systems and architectures: Design, exploration, and experimental analysis of heterogeneous computing systems such as GPGPUs, heterogeneous systems-on-chip (SoC), accelerator systems (e.g., Xeon Phi), FPGAs, big.LITTLE, and application-specific architectures.
  • Heterogeneous parallel and distributed systems: Design and analysis of computing grids, cloud systems, hybrid clusters, datacenters, geo-distributed computing systems, and supercomputers.
  • Algorithms for heterogeneous systems: Parallel algorithms for solving problems on heterogeneous systems (multicores, hybrid clusters, grids or clouds); strategies for scheduling and allocation on heterogeneous 2D and 3D multicore architectures; scheduling and resource management for large-scale and parallel heterogeneous systems.
  • Deep-memory hierarchies: Design and analysis of memory hierarchies with SRAM, DRAM, Flash/SSD and HDD technologies; NUMA architectures; cache coherence strategies; novel memory systems such as phase-change RAM, magnetic (e.g., STT) RAM, 3D Xpoint/crossbars, and memristors. 
  • On-chip and off-chip network architectures: Network-on-chip (NoC) architectures and protocols for heterogeneous multicores and heterogeneous applications; energy, latency, reliability, and security optimizations for NoCs; off-chip (chip-to-chip) network architectures and optimizations; large scale parallel and distributed network design, evaluation, and optimizations.
  • Programming models and tools: Programming paradigms and tools for heterogeneous systems; middleware and runtime systems; performance-abstraction tradeoff; interoperability of heterogeneous software environments; workflows; dataflows. 
  • Modeling, characterization, and optimizations: Performance models and their use in the design of parallel and distributed algorithms for heterogeneous platforms, characterizations and optimizations for improving the time to solve a problem (throughput, latency, runtime), modeling and optimizing electric consumption (power, energy); modeling for failure management (fault tolerance, recovery, reliability); modeling for security in heterogeneous platforms. 
  • Applications on heterogeneous systems: Case studies; confluence of Big Data systems and heterogeneous systems; data-intensive computing; deep learning; scientific computing.

IMPORTANT DATES


  • Paper submission: January 25, 2018
  • Author notification: February 28, 2018
  • Camera Ready: March 15, 2018

 

PAPER SUBMISSIONS


Submissions will be done through the EasyChair.

WORKSHOP ORGANIZATION


General Chair:   Alexey Lastovetsky, University College Dublin, Ireland

Program Chair:  Sudeep Pasricha, Colorado State University, USA (TPC CHAIR)

 

Steering Committee:


  • Behrooz Shirazi, Washington State University, U.S.A., Chair
  • John Antonio, University of Oklahoma, U.S.A.
  • Francine Berman, Rensselaer Polytechnic Institute, U.S.A.
  • Jack Dongarra, University of Tennessee, U.S.A.
  • Jerry Potter, Colorado State University, U.S.A.
  • Viktor K. Prasanna, University of Southern California, U.S.A.
  • Yves Robert, Ecole Normale Superieure de Lyon, France
  • H. J. Siegel, Colorado State University, U.S.A.
  • Vaidy Sunderam, Emory University, U.S.A
  • Uwe Schwiegelshohn, TU Dortmund University, Germany

   Technical Program Committee:


  • Sudeep Pasricha, Colorado State University, USA (TPC CHAIR)
  • Domingo Gimenez, University of Murcia, Spain
  • Florina M. Ciorba, University of Basel, Switzerland
  • Hatem Ltaief, KAUST, Saudi Arabia    
  • Francois Tessier, Argonne National Laboratory, USA
  • Matthias Diener, University of Illinois at Urbana-Champaign, USA    
  • C.J. Newburn, NVidia, USA
  • Alexey Lastovetsky, University College Dublin, Ireland
  • Dana Petcu, West University of Timisoara, Romania
  • Daniel Cordeiro, University of Sao Paulo, Brazil    
  • Ioana Banicescu, Mississippi State University, USA
  • Achim Streit, Karlsruhe Institute of Technology, Germany
  • Louis-Claude Canon, UniversitÈ de Franche-ComtÈ, France
  • Samuel Thibault, LaBRI, UniversitÈ Bordeaux, France    
  • Ryan Friese, Pacific Northwest National Laboratory, USA
  • Devesh Tiwari, Northeastern University, US
  • Mohsen Amini, University of Louisiana Lafayette, USA 

Questions may be sent to the program chair: Sudeep Pasricha

 

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